ADC
CS1253
MAIN PARAMETERS

22-bit without missing code, ENOB is up to 18.5 bits

5-line SPI interface

Cascading of up to eight chips is supported

Introduction

CS1252 is a data collection and processing chip.  It can process signals of four bandwidth upper limits to 584 Hz.The effective precision reaches 22 bits and the dynamic range of signals is from 91 dB (584 Hz) to 103 dB (36.5 Hz).

The chip includes four independent A/D conversion channels, which adopt the Sigma-Delta technology.Inside the chip, there is a 16-bit control register, which is configured through pins SCLK, SDATA, and TFS. Three bits of the control register are used to set the cut-off frequency of the digital filter inside the chip. The options of the cut-off frequencies include 584 Hz, 292 Hz, 146 Hz, 73 Hz and 36.5 Hz.

Features

22-bit Sigma-Delta ADC

100 dB dynamic range (73 Hz input)

±0.006% INL

Low-pass digital filter, programming cut-off frequencies from 584 Hz to 36.5 Hz

Supporting application of 5 V and 3 V voltage

Low power consumption: 50 mW

Control of filter cut-off frequencies by software

Universal SPI interface

Supporting cascading of up to eight chips

Applications

Biomedical data collection, electrocardiograph, and electroencephalograph

Processing control

High-precision equipment

Seismic analyzer

Package Type

SOP24

Block Diagram
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